It's been a while since I last scanned through Image Sensors World blog. Around the beginning of August, as a matter of fact. Since that time, they noted that Canon filed for a "Dual Scale" CPADC patent:
http://image-sensors-world.blogspot.com.es/2013/08/canon-files-for-dual-range-column.html
If I understand the diagrams and the patent correctly, and I am no CMOS engineer, it sounds like Canon is maybe following ML's lead in using a dual gain (i.e. Dual ISO) approach to achieving higher dynamic range. Given how long it takes to produce technology viable enough for a patent, I suspect Canon had this idea long before ML...perhaps it was simply that ML got wind of this patent, and looked for a way to achieve the same thing with current Canon sensors...either way, interesting.
The more interesting thing to me than the dial gain, though, is the CP-ADC design. I've long said that Canon needs to modernize their sensor design, get rid of the noise generators (i.e. ADCs) in their DIGIC chips, and bring all that image processing onto the same die as the rest of the sensor. This is what Sony did (although they took it a step farther and converted to a digital readout/CDS approach, whereas as far as I can tell Canon's is still analog CDS and whatnot until it is actually converted to digital), and they achieved some significant DR benefits from the move.
Anyway, personally, I'm glad to hear Canon is investigating these options. CP-ADC is something I've wanted Canon to do for a long time, happy to see they might actually do it. God only knows if/when this technology may actually find it's way into their sensors...I only hope and pray it is soon. And dual-gain to boot...which has the potential to support FAR more than 14 stops of DR. With a 16-bit CP-ADC, we might even see a full 16 stops of DR (and who knows what might come after that...20-bit, 24-bit ADC? Can't imagine the file sizes though...46mp * 24bit...phew, 1.1Gb RAW (uncompressed) data size! Canon will need a DIGIC more than four times as fast as the current DIGIC chip...)
http://image-sensors-world.blogspot.com.es/2013/08/canon-files-for-dual-range-column.html
If I understand the diagrams and the patent correctly, and I am no CMOS engineer, it sounds like Canon is maybe following ML's lead in using a dual gain (i.e. Dual ISO) approach to achieving higher dynamic range. Given how long it takes to produce technology viable enough for a patent, I suspect Canon had this idea long before ML...perhaps it was simply that ML got wind of this patent, and looked for a way to achieve the same thing with current Canon sensors...either way, interesting.
The more interesting thing to me than the dial gain, though, is the CP-ADC design. I've long said that Canon needs to modernize their sensor design, get rid of the noise generators (i.e. ADCs) in their DIGIC chips, and bring all that image processing onto the same die as the rest of the sensor. This is what Sony did (although they took it a step farther and converted to a digital readout/CDS approach, whereas as far as I can tell Canon's is still analog CDS and whatnot until it is actually converted to digital), and they achieved some significant DR benefits from the move.
Anyway, personally, I'm glad to hear Canon is investigating these options. CP-ADC is something I've wanted Canon to do for a long time, happy to see they might actually do it. God only knows if/when this technology may actually find it's way into their sensors...I only hope and pray it is soon. And dual-gain to boot...which has the potential to support FAR more than 14 stops of DR. With a 16-bit CP-ADC, we might even see a full 16 stops of DR (and who knows what might come after that...20-bit, 24-bit ADC? Can't imagine the file sizes though...46mp * 24bit...phew, 1.1Gb RAW (uncompressed) data size! Canon will need a DIGIC more than four times as fast as the current DIGIC chip...)